module controller (clk, reset, start, done, load_multiplication, load_product,
				   shift_multiplication, shift_product, reset_product);
	parameter size = 4; //32 bits
	input clk;
	input reset;
	input start;
	output reg load_multiplication;
	output reg shift_multiplication;
	output reg reset_product;
	output reg load_product;
	output reg shift_product;
	output reg done;
	
	reg [1:0] state, next_state;
	reg [size:0] counter, next_counter;
	
	parameter
		S0 = 2'b00,
		S1 = 2'b01,
		S2 = 2'b10,
		S3 = 2'b11;

	// registrador de estados	
	always@(posedge clk) begin
		if(reset) begin
			state <= S0;
			counter <= 0;
		end else begin
			state <= next_state;
			counter <= next_counter;
		end
	end
	
	// funcao de proximo estado
	always@(state, counter, start) begin
	next_state = state;	
		case(state)
			S0:
				if(start)
					next_state = S1;
			S1:
				next_state = S2;
			S2:
				if(counter == 0)
					next_state = S3;
				else
					next_state = S1;
			S3:
				next_state = S0;
		endcase
	end
	
	// logica de saida
	always@(state or counter or start) begin
	// valores padrao
	next_counter = counter;
	shift_product = 1'b0;
	done = 1'b0;
	shift_multiplication = 1'b0;
	load_multiplication = 1'b0;
	reset_product = 1'b0;
	load_product = 1'b0;

		case(state)
			S0: 
			begin
				if(start) begin
					next_counter = 0;
					load_multiplication = 1'b1;
					reset_product = 1'b1;
				end
			end
			S1: 
			begin
				next_counter = next_counter + 1'b1;
				load_product = 1'b1;
			end
			S2: 
			begin
				shift_multiplication = 1'b1;
				shift_product = 1'b1;
			end
			S3: begin
				done = 1'b1;
				load_product = 1'b1;
			end
		endcase
	end
	
endmodule
